I am a detail-oriented IC Layout Designer with hands-on experience in advanced layout techniques, error debugging, and collaborative design across major semiconductor projects.
-Experienced using Cadence virtuoso (Layout XL) , SX-meister (asca, ismo)
-Recognized expertise in designing multiple functional blocks including DAC, IREF, AMP, Level Shifter, VREG, and OSC.
-Proficient in computer applications and capable of preparing professional documents with ease.
